Lab: Binary adder
Objectives:
This lab will help explore Quartus II software (available through Altera - http://www.altera.com/ - using the RSR Electronics PLDT-2 protoboard - http://www.elexp.com/tst_pld2.htm
Objectives:
- Gain experience using Quartus II software and the PLDT-2 board.
- Investigate a circuit by a description of its function (what it does).
- Compare the results of the truth table with the circuit output.
Software: |
Click
to see an Altera |
Hardware:
RSR Electronics PLDT-2 CPLD Trainer board
Background:
We are to design a 2-bit adder. We will start with a truth table, then find equations for each output bit.
The truth table will have 4 inputs: we're adding 2 two-bit numbers (4 inputs) and getting a 3-bit answer (3 outputs).
How do we fill the truth table? Start the input column just like other 4-input truth tables we've seen: we'll name our 2-bit inputs A1A0 and B1B0, and they add as shown:
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Our truth table will have 3 columns for the output - we can figure 3 at the same time easier than each individual bit. For example, our output "row" for the above example is row 1011 (remember the inputs are A1A0B1B0)
Fill in the rest of the truth table... for example, row 0 1 0 1 means
01 + 01 = 010, so after row 0101, put the output 010.
When you fill out the complete truth table, you will have 3 K-maps to fill out: one for X2, one for X1 and one for X0. Once you find equations for each of these three outputs, you are ready to program!
Procedure:
- Create the schematic (draw the circuit) for each expression (X2, X1 and X0) using the schematic capture portion of Quartus II. For example, your equation for X2 should be:
- Select the following inputs/outputs (careful: which pin assignments
should be made for the outputs?):
Inputs:
A1 = 34
A0 = 33
B1 = 36
B0 = 35
Outputs:
X2 = 44
X1 = 45
X0 = 46
- Simulate: do the results show as expected?
- Download the program to the PLDT-2 Trainer board.
- Compare the output of your CPLD with the truth tables you created.
When the switch is in the up position (L), the input to the logic
circuit is a 0, When the switch is in the down position (H), the
input to the logic circuit is a 1.
Instructors who would like to implement this experiment: please contact Ken Reid at IUPUI (kreid1@iupui.edu) for more information.